1. Technical Field
Various embodiments of the present invention generally relate to semiconductor integrated circuits. In particular, certain embodiments relate to a semiconductor memory apparatus.
2. Related Art
A semiconductor memory apparatus typically includes a plurality of data storage memory cells to store data from external input and output stored data therefrom. A memory cell may consist of a capacitor and a transistor which stores data by charging or discharging charge in/from the capacitor.
A semiconductor memory apparatus which stores data in this way performs refresh operations regularly to substantially maintain the amount of charge in the capacitor.
Since the semiconductor memory apparatus stores data and outputs stored data, the highest priority operation is substantially maintaining the stored data. Such a refresh operation has the highest priority in the semiconductor memory apparatus.
The refresh operations may be classified into auto-refresh operations and self-refresh operations. The auto-refresh operation is performed by an external controller for controlling the semiconductor memory apparatus, and the self-refresh operation is performed when the external controller does not output a command for a predetermined time.
Thus, while the semiconductor memory apparatus is performing the auto-refresh operation by the external controller, the external controller outputs neither a command nor an address to the semiconductor memory apparatus. However, a typical semiconductor memory apparatus operates circuits for receiving commands and addresses output from the external controller during the auto-refresh operation, resulting in an increase in current consumption.